(China (Mainland))
Product Summary
The GAL20V8B-15LJNI is a 5ns maximum propagation delay time, combining a high performance CMOS process with Electrically Eras-able (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times(<100ms) allow the GAL20V8B-15LJNI to be reprogrammed quickly and efficiently.
Parametrics
GAL20V8B-15LJNI absolute maximum ratings: (1)Supply voltage VCC: –0.5 to +7V; (2)Input voltage applied: –2.5 to VCC +1.0V; (3)Off-state output voltage applied:–2.5 to VCC +1.0V; (4)Storage Temperature: –65 to 150℃; (5)Ambient Temperature with Power Applied:–55 to 125℃.
Features
GAL20V8B-15LJNI features: (1)50% to 75% reduction in power from bipolar; (2)active pull-ups on all pins; (3)eight output logic macrocells; (4)electronic signature for identification; (5)lead-free package options.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||
|---|---|---|---|---|---|---|---|---|---|---|
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 GAL20V8B-15LJNI |
Lattice |
SPLD - Simple Programmable Logic Devices HI PERF E2CMOS PLD |
Data Sheet |
Negotiable |
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| Image | Part No | Mfg | Description | |
Pricing (USD) |
Quantity | ||||
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GAL20LV8 |
Other |
|
Data Sheet |
Negotiable |
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GAL20LV8ZD |
Other |
|
Data Sheet |
Negotiable |
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GAL20RA10 |
Other |
|
Data Sheet |
Negotiable |
|
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|
GAL20RA10B-10LJ |
Lattice |
SPLD - Simple Programmable Logic Devices 20 INPUT 10 OUTPUT 5 V LOW POWER 10ns |
Data Sheet |
Negotiable |
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GAL20RA10B-10LP |
Lattice |
SPLD - Simple Programmable Logic Devices 20 INPUT 10 OUTPUT 5 V LOW POWER 10ns |
Data Sheet |
Negotiable |
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|
GAL20RA10B-15LJ |
Lattice |
SPLD - Simple Programmable Logic Devices 20 INPUT 10 OUTPUT 5 V LOW POWER 15ns |
Data Sheet |
Negotiable |
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