Product Summary

The EPF6016AQC208-2N is a programmable logic device. It provides a low-cost alternative to high-volume gate array designs. The EPF6016AQC208-2N is based on the OptiFLEX architecture, which minimizes die size while maintaining high performance and routability. The EPF6016AQC208-2N has reconfigurable SRAM elements, which give designers the flexibility to quickly change their designs during prototyping and design testing. Designers can also change functionality during operation via in-circuit reconfiguration.

Parametrics

EPF6016AQC208-2N absolute maximum ratings: (1)Supply voltage:–2.0 to 7.0 V; (2)DC input voltage:–2.0 to 7.0 V; (3)DC output current, per pin:–25 to 25 mA; (4)Storage temperature:–65℃ to 150℃; (5)Ambient temperature:–65℃ to 135℃; (6)Junction temperature:135℃.

Features

EPF6016AQC208-2N features: (1)Register-rich, look-up table- (LUT-) based architecture; (2)OptiFLEX architecture that increases device area efficiency; (3)Typical gates ranging from 5,000 to 24,000 gates; (4)Built-in low-skew clock distribution tree; (5)100% functional testing of all devices; test vectors or scan chains are not required; (6)Built-in Joint Test Action Group (JTAG) boundary-scan test(BST) circuitry compliant with IEEE Std. 1149.1-1990, available without consuming additional device logic; (7)MultiVoltTM I/O interface operation, allowing a device to bridge between systems operating at different voltages; (8)Low power consumption (typical specification less than 0.5 mA In standby mode) ; (9)3.3-V devices support hot-socketing.

Diagrams

EPF6016AQC208-2N block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)		 Quantity
EPF6016AQC208-2N
EPF6016AQC208-2N

IC FLEX 6000 FPGA 16K 208-PQFP
Data Sheet
0-144: $23.40
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(USD)		 Quantity
EPF6016AQC208-2
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Data Sheet
0-1: $23.40
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Data Sheet
0-144: $23.40
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Data Sheet
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